1. Field of the Invention
The present invention relates to a circuit structure of a circuit board. More particularly, the present invention relates to a circuit structure of a circuit board in which embedded circuits and non-embedded circuits are together disposed in a circuit layer.
2. Description of Related Art
According to current technologies, an embedded circuit board has been evolved from a common non-embedded circuit board. In particular, the common non-embedded circuit board is characterized in that circuits therein protrude from a surface of a dielectric layer. By contrast, circuits of the embedded circuit board are inlaid in the dielectric layer. Currently, a circuit structure of the circuit board is formed by performing a photolithography and etching process or a laser ablating process. Please refer to FIGS. 1A through 1E, FIGS. 2A through 2C, and following descriptions regarding a method of forming said circuit structure of the circuit board.
FIGS. 1A through 1E are schematic cross-sectional views illustrating a process for manufacturing a circuit structure of a conventional circuit board. As shown in FIG. 1A, in the process for manufacturing the circuit structure of the conventional circuit board, a dielectric layer 12 having a surface 12a is provided at first. Next, as indicated in FIG. 1B, a metal layer 14 is formed on the surface 12a of the dielectric layer 12. Referring to FIG. 1C, a patterned mask 16 is then formed on the metal layer 14. Thereafter, referring to FIGS. 1C and 1D, a portion of the metal layer 14 which is not covered by the patterned mask 16 is etched with use of the patterned mask 16 as an etching mask, so as to form a normal circuit pattern 14a and an ultra fine circuit pattern 14b. After that, the patterned mask 16 is removed to expose the normal circuit pattern 14a and the ultra fine circuit pattern 14b. A circuit structure of a conventional circuit board 10 is roughly formed so far.
In the circuit structure of the conventional circuit board 10, the photolithography and etching process is performed to simultaneously form the normal circuit pattern 14a and the ultra fine circuit pattern 14b in a circuit layer. Here, a line width of a circuit 14b′ of the ultra fine circuit pattern 14b is smaller than a line width of a circuit 14a′ of the normal circuit pattern 14a. Nonetheless, subject to manufacturing limitations of the conventional etching process by which the circuit 14b′ of the ultra fine circuit pattern 14b is formed, an etching variability in the etching process with use of an etchant is unlikely to be precisely controlled, i.e., residual copper on the metal layer 14 and on the surface 12a of the dielectric layer 12 is not able to be well managed. Thereby, the line width of the circuit 14b′ of the ultra fine circuit pattern 14b has a relatively large tolerance when the ultra fine circuit pattern 14b is fabricated by performing the conventional manufacturing process. In other words, the line width of the circuit 14b′ of the ultra fine circuit pattern 14b cannot be accurately manipulated in the conventional etching process. As such, in the circuit structure of the conventional circuit board 10, the normal circuit pattern 14a and the ultra fine circuit pattern 14b cannot be formed on the surface 12a of the same dielectric layer 12 by implementing the conventional photolithography and etching process.
FIGS. 2A through 2C are schematic cross-sectional views illustrating a process for manufacturing a circuit structure of a conventional embedded circuit board. As shown in FIG. 2A, in the process for manufacturing the circuit structure of the conventional embedded circuit board, a dielectric layer 22 having a surface 22a is provided at first. Next, as indicated in FIG. 2B, the surface 22a of the dielectric layer 22 is irradiated by a laser beam L, so as to form a first intaglio pattern 22b and a second intaglio pattern 22c. Referring to FIG. 2C, a normal circuit pattern 24a and an ultra fine circuit pattern 24b are then formed in the first intaglio pattern 22b and the second intaglio pattern 22c, respectively. A circuit structure of a conventional embedded circuit board 20 is roughly formed so far.
In the circuit structure of the conventional embedded circuit board 20, the laser ablating process is performed to simultaneously form the normal circuit pattern 24a and the ultra fine circuit pattern 24b in a circuit layer. Here, a line width of a circuit 24a′ of the normal circuit pattern 24a is greater than a line width of a circuit 24b′ of the ultra fine circuit pattern 24b. That is to say, in order to allow the circuit 24a′ of the normal circuit pattern 24a to have the required line width, the laser ablating process must be performed on a relatively large area on the dielectric layer 22 with use of the laser beam L for forming the first intaglio pattern 22b. Thereby, more laser energy and more time are required. In addition, given that the laser ablating process is performed on the dielectric layer 22 for a long time, flatness of a bottom surface of the first intaglio pattern 22b may not be uniform. Namely, the laser abating process is not suitable for manufacturing the normal circuit pattern 24a in the circuit structure of the conventional embedded circuit board 20 due to possibilities of consuming additional time and resulting in unstable circuit quality.